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Issue #1905 - Part 3f - Collection of fixes connecting ARM support to the Mac build. Also update ARM XPT code to add Mac/Apple support.

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This commit is contained in:
Brian Smith
2022-06-09 18:08:04 -05:00
committed by roytam1
parent e73d4de0b4
commit e55ae571da
8 changed files with 135 additions and 58 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ipc/chromium/src/base/atomicops.h
+1 -1
View File
@@ -135,7 +135,7 @@ Atomic64 Release_Load(volatile const Atomic64* ptr);
// Include our platform specific implementation.
#if defined(OS_WIN) && defined(ARCH_CPU_X86_FAMILY)
#include "base/atomicops_internals_x86_msvc.h"
#elif defined(OS_MACOSX) && defined(ARCH_CPU_X86_FAMILY)
#elif defined(OS_MACOSX) && (defined(ARCH_CPU_X86_FAMILY) || defined(ARCH_CPU_ARM64))
#include "base/atomicops_internals_x86_macosx.h"
#elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY)
#include "base/atomicops_internals_x86_gcc.h"
xpcom/build/moz.build
+3 -2
View File
@@ -37,8 +37,9 @@ elif CONFIG['MOZ_WIDGET_TOOLKIT'] == 'cocoa':
'PoisonIOInterposerBase.cpp',
'PoisonIOInterposerMac.cpp',
]
SOURCES += ['mach_override.c']
SOURCES['mach_override.c'].flags += ['-Wno-unused-function']
if CONFIG["CPU_ARCH"] != "aarch64":
SOURCES += ['mach_override.c']
SOURCES['mach_override.c'].flags += ['-Wno-unused-function']
else:
SOURCES += ['PoisonIOInterposerStub.cpp']
xpcom/glue/FileUtils.cpp
+2
View File
@@ -281,6 +281,8 @@ static const uint32_t CPU_TYPE = CPU_TYPE_X86_64;
static const uint32_t CPU_TYPE = CPU_TYPE_POWERPC;
#elif defined(__ppc64__)
static const uint32_t CPU_TYPE = CPU_TYPE_POWERPC64;
#elif defined(__aarch64__)
static const uint32_t CPU_TYPE = CPU_TYPE_ARM64;
#else
#error Unsupported CPU type
#endif
xpcom/reflect/xptcall/md/unix/moz.build
+5
View File
@@ -17,6 +17,11 @@ if CONFIG['OS_ARCH'] == 'Darwin':
SOURCES += [
'xptcinvoke_asm_x86_64_unix.S',
]
if CONFIG["CPU_ARCH"] == "aarch64":
SOURCES += [
"xptcinvoke_asm_aarch64.S",
"xptcstubs_asm_aarch64.S",
]
if '86' in CONFIG['OS_TEST'] and CONFIG['OS_TEST'] != 'x86_64':
DEFINES['MOZ_NEED_LEADING_UNDERSCORE'] = True
xpcom/reflect/xptcall/md/unix/xptcinvoke_asm_aarch64.s
+30 -5
View File
@@ -3,20 +3,36 @@
* License, v. 2.0. If a copy of the MPL was not distributed with this
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
.section ".text"
.globl _NS_InvokeByIndex
#ifdef __APPLE__
#define SYM(x) _ ## x
#else
#define SYM(x) x
#endif
.text
.align 2
.globl SYM(_NS_InvokeByIndex)
#ifndef __APPLE__
.type _NS_InvokeByIndex,@function
#endif
/*
* _NS_InvokeByIndex(nsISupports* that, uint32_t methodIndex,
* uint32_t paramCount, nsXPTCVariant* params)
*/
_NS_InvokeByIndex:
SYM(_NS_InvokeByIndex):
.cfi_startproc
# set up frame
stp x29, x30, [sp,#-32]!
.cfi_adjust_cfa_offset 32
.cfi_rel_offset x29, 0
.cfi_rel_offset x30, 8
mov x29, sp
.cfi_def_cfa_register x29
stp x19, x20, [sp,#16]
.cfi_rel_offset x19, 16
.cfi_rel_offset x20, 24
# save methodIndex across function calls
mov w20, w1
@@ -37,7 +53,7 @@ _NS_InvokeByIndex:
# start of stack area passed to invoke_copy_to_stack
mov x0, sp
bl invoke_copy_to_stack
bl SYM(invoke_copy_to_stack)
# load arguments passed in r0-r7
ldp x6, x7, [sp, #48]
@@ -58,10 +74,19 @@ _NS_InvokeByIndex:
blr x16
add sp, sp, w19, uxth #3
.cfi_def_cfa_register sp
ldp x19, x20, [sp,#16]
.cfi_restore x19
.cfi_restore x20
ldp x29, x30, [sp],#32
.cfi_adjust_cfa_offset -32
.cfi_restore x29
.cfi_restore x30
ret
.cfi_endproc
#ifndef __APPLE__
.size _NS_InvokeByIndex, . - _NS_InvokeByIndex
.section .note.GNU-stack, "", @progbits
#endif
xpcom/reflect/xptcall/md/unix/xptcstubs_aarch64.cpp
+67 -48
View File
@@ -4,12 +4,24 @@
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
#include "xptcprivate.h"
#include "xptiprivate.h"
#ifndef __AARCH64EL__
#error "Only little endian compatibility was tested"
#endif
template<typename T> void
get_value_and_advance(T* aOutValue, void*& aStack) {
#ifdef __APPLE__
const size_t aligned_size = sizeof(T);
#else
const size_t aligned_size = 8;
#endif
// Ensure the pointer is aligned for the type
uintptr_t addr = (reinterpret_cast<uintptr_t>(aStack) + aligned_size - 1) & ~(aligned_size - 1);
memcpy(aOutValue, reinterpret_cast<void*>(addr), sizeof(T));
aStack = reinterpret_cast<void*>(addr + aligned_size);
}
/*
* This is for AArch64 ABI
*
@@ -17,18 +29,15 @@
* the "fp" registers are stored in fprData. Each array has 8 regs
* but first reg in gprData is a placeholder for 'self'.
*/
extern "C" nsresult
PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
extern "C" nsresult ATTRIBUTE_USED
PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, void* args,
uint64_t *gprData, double *fprData)
{
#define PARAM_BUFFER_COUNT 16
#define PARAM_GPR_COUNT 8
#define PARAM_FPR_COUNT 8
nsXPTCMiniVariant paramBuffer[PARAM_BUFFER_COUNT];
nsXPTCMiniVariant* dispatchParams = NULL;
const nsXPTMethodInfo* info;
nsresult result = NS_ERROR_FAILURE;
NS_ASSERTION(self,"no self");
@@ -37,27 +46,30 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
uint32_t paramCount = info->GetParamCount();
// setup variant array pointer
if (paramCount > PARAM_BUFFER_COUNT) {
dispatchParams = new nsXPTCMiniVariant[paramCount];
} else {
dispatchParams = paramBuffer;
}
NS_ASSERTION(dispatchParams,"no place for params");
const uint8_t indexOfJSContext = info->IndexOfJSContext();
uint64_t* ap = args;
void* ap = args;
uint32_t next_gpr = 1; // skip first arg which is 'self'
uint32_t next_fpr = 0;
for (uint32_t i = 0; i < paramCount; i++) {
const nsXPTParamInfo& param = info->GetParam(i);
const nsXPTType& type = param.GetType();
nsXPTCMiniVariant* dp = &dispatchParams[i];
nsXPTCMiniVariant* dp = &paramBuffer[i];
if (i == indexOfJSContext) {
if (next_gpr < PARAM_GPR_COUNT)
next_gpr++;
else {
void* value;
get_value_and_advance(&value, ap);
}
}
if (param.IsOut() || !type.IsArithmetic()) {
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.p = (void*)gprData[next_gpr++];
} else {
dp->val.p = (void*)*ap++;
get_value_and_advance(&dp->val.p, ap);
}
continue;
}
@@ -67,7 +79,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.i8 = (int8_t)gprData[next_gpr++];
} else {
dp->val.i8 = (int8_t)*ap++;
get_value_and_advance(&dp->val.i8, ap);
}
break;
@@ -75,7 +87,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.i16 = (int16_t)gprData[next_gpr++];
} else {
dp->val.i16 = (int16_t)*ap++;
get_value_and_advance(&dp->val.i16, ap);
}
break;
@@ -83,7 +95,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.i32 = (int32_t)gprData[next_gpr++];
} else {
dp->val.i32 = (int32_t)*ap++;
get_value_and_advance(&dp->val.i32, ap);
}
break;
@@ -91,7 +103,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.i64 = (int64_t)gprData[next_gpr++];
} else {
dp->val.i64 = (int64_t)*ap++;
get_value_and_advance(&dp->val.i64, ap);
}
break;
@@ -99,7 +111,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.u8 = (uint8_t)gprData[next_gpr++];
} else {
dp->val.u8 = (uint8_t)*ap++;
get_value_and_advance(&dp->val.u8, ap);
}
break;
@@ -107,7 +119,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.u16 = (uint16_t)gprData[next_gpr++];
} else {
dp->val.u16 = (uint16_t)*ap++;
get_value_and_advance(&dp->val.u16, ap);
}
break;
@@ -115,7 +127,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.u32 = (uint32_t)gprData[next_gpr++];
} else {
dp->val.u32 = (uint32_t)*ap++;
get_value_and_advance(&dp->val.u32, ap);
}
break;
@@ -123,7 +135,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.u64 = (uint64_t)gprData[next_gpr++];
} else {
dp->val.u64 = (uint64_t)*ap++;
get_value_and_advance(&dp->val.u64, ap);
}
break;
@@ -131,7 +143,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_fpr < PARAM_FPR_COUNT) {
memcpy(&dp->val.f, &fprData[next_fpr++], sizeof(dp->val.f));
} else {
memcpy(&dp->val.f, ap++, sizeof(dp->val.f));
get_value_and_advance(&dp->val.f, ap);
}
break;
@@ -139,15 +151,17 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_fpr < PARAM_FPR_COUNT) {
memcpy(&dp->val.d, &fprData[next_fpr++], sizeof(dp->val.d));
} else {
memcpy(&dp->val.d, ap++, sizeof(dp->val.d));
get_value_and_advance(&dp->val.d, ap);
}
break;
case nsXPTType::T_BOOL:
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.b = (bool)gprData[next_gpr++];
dp->val.b = (bool)(uint8_t)gprData[next_gpr++];
} else {
dp->val.b = (bool)*ap++;
uint8_t value;
get_value_and_advance(&value, ap);
dp->val.b = (bool)value;
}
break;
@@ -155,7 +169,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.c = (char)gprData[next_gpr++];
} else {
dp->val.c = (char)*ap++;
get_value_and_advance(&dp->val.c, ap);
}
break;
@@ -163,7 +177,7 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
if (next_gpr < PARAM_GPR_COUNT) {
dp->val.wc = (wchar_t)gprData[next_gpr++];
} else {
dp->val.wc = (wchar_t)*ap++;
get_value_and_advance(&dp->val.wc, ap);
}
break;
@@ -173,35 +187,40 @@ PrepareAndDispatch(nsXPTCStubBase* self, uint32_t methodIndex, uint64_t* args,
}
}
result = self->mOuter->CallMethod((uint16_t)methodIndex, info, dispatchParams);
if (dispatchParams != paramBuffer) {
delete [] dispatchParams;
}
nsresult result = self->mOuter->CallMethod((uint16_t)methodIndex, info,
paramBuffer);
return result;
}
#ifdef __APPLE__
#define GNU(str)
#define UNDERSCORE "__"
#else
#define GNU(str) str
#define UNDERSCORE "_"
#endif
// Load w17 with the constant 'n' and branch to SharedStub().
# define STUB_ENTRY(n) \
__asm__ ( \
".section \".text\" \n\t" \
".text\n\t" \
".align 2\n\t" \
".if "#n" < 10 \n\t" \
".globl _ZN14nsXPTCStubBase5Stub"#n"Ev \n\t" \
".hidden _ZN14nsXPTCStubBase5Stub"#n"Ev \n\t" \
".type _ZN14nsXPTCStubBase5Stub"#n"Ev,@function \n\n" \
"_ZN14nsXPTCStubBase5Stub"#n"Ev: \n\t" \
".globl " UNDERSCORE "ZN14nsXPTCStubBase5Stub"#n"Ev \n\t" \
GNU(".hidden _ZN14nsXPTCStubBase5Stub"#n"Ev \n\t") \
GNU(".type _ZN14nsXPTCStubBase5Stub"#n"Ev,@function \n\n")\
"" UNDERSCORE "ZN14nsXPTCStubBase5Stub"#n"Ev: \n\t" \
".elseif "#n" < 100 \n\t" \
".globl _ZN14nsXPTCStubBase6Stub"#n"Ev \n\t" \
".hidden _ZN14nsXPTCStubBase6Stub"#n"Ev \n\t" \
".type _ZN14nsXPTCStubBase6Stub"#n"Ev,@function \n\n" \
"_ZN14nsXPTCStubBase6Stub"#n"Ev: \n\t" \
".globl " UNDERSCORE "ZN14nsXPTCStubBase6Stub"#n"Ev \n\t" \
GNU(".hidden _ZN14nsXPTCStubBase6Stub"#n"Ev \n\t") \
GNU(".type _ZN14nsXPTCStubBase6Stub"#n"Ev,@function \n\n")\
"" UNDERSCORE "ZN14nsXPTCStubBase6Stub"#n"Ev: \n\t" \
".elseif "#n" < 1000 \n\t" \
".globl _ZN14nsXPTCStubBase7Stub"#n"Ev \n\t" \
".hidden _ZN14nsXPTCStubBase7Stub"#n"Ev \n\t" \
".type _ZN14nsXPTCStubBase7Stub"#n"Ev,@function \n\n" \
"_ZN14nsXPTCStubBase7Stub"#n"Ev: \n\t" \
".globl " UNDERSCORE "ZN14nsXPTCStubBase7Stub"#n"Ev \n\t" \
GNU(".hidden _ZN14nsXPTCStubBase7Stub"#n"Ev \n\t") \
GNU(".type _ZN14nsXPTCStubBase7Stub"#n"Ev,@function \n\n")\
UNDERSCORE "ZN14nsXPTCStubBase7Stub"#n"Ev: \n\t" \
".else \n\t" \
".err \"stub number "#n" >= 1000 not yet supported\"\n" \
".endif \n\t" \
xpcom/reflect/xptcall/md/unix/xptcstubs_asm_aarch64.s
+25 -2
View File
@@ -2,16 +2,30 @@
# License, v. 2.0. If a copy of the MPL was not distributed with this
# file, You can obtain one at http://mozilla.org/MPL/2.0/.
#ifdef __APPLE__
#define SYM(x) _ ## x
#else
#define SYM(x) x
#endif
.set NGPREGS,8
.set NFPREGS,8
.section ".text"
.text
.align 2
.globl SharedStub
#ifndef __APPLE__
.hidden SharedStub
.type SharedStub,@function
#endif
SharedStub:
.cfi_startproc
stp x29, x30, [sp,#-16]!
.cfi_adjust_cfa_offset 16
.cfi_rel_offset x29, 0
.cfi_rel_offset x30, 8
mov x29, sp
.cfi_def_cfa_register x29
sub sp, sp, #8*(NGPREGS+NFPREGS)
stp x0, x1, [sp, #64+(0*8)]
@@ -30,10 +44,19 @@ SharedStub:
add x3, sp, #8*NFPREGS
add x4, sp, #0
bl PrepareAndDispatch
bl SYM(PrepareAndDispatch)
add sp, sp, #8*(NGPREGS+NFPREGS)
.cfi_def_cfa_register sp
ldp x29, x30, [sp],#16
.cfi_adjust_cfa_offset -16
.cfi_restore x29
.cfi_restore x30
ret
.cfi_endproc
#ifndef __APPLE__
.size SharedStub, . - SharedStub
.section .note.GNU-stack, "", @progbits
#endif
xpcom/reflect/xptcall/md/unix/xptcstubs_darwin.cpp
+2
View File
@@ -11,6 +11,8 @@
#include "xptcstubs_ppc_rhapsody.cpp"
#elif defined(__arm__)
#include "xptcstubs_arm.cpp"
#elif defined(__aarch64__)
#include "xptcstubs_aarch64.cpp"
#else
#error unknown cpu architecture
#endif